Funvizeo logo
  • Contents
      • Back
      • Verilog
      • SystemVerilog
      • UVM
      • Digital Basics
      • Verification
Most Popular
Verification
  Testbench Evolution
  Constraint Random Verification
  Verification Techniques
  Verification Plan
  Code Coverage

Verilog
  Data Types
  Basic Constructs
  Behavioral Modeling
  Gate Modeling
  Simulation Basics
  Design Examples
  Interview Questions

SystemVerilog
  Data Types
  Class
  Interface
  Constraints and more!
  Testbench Examples
  Interview Questions

UVM
  Sequences
  Testbench Components
  TLM Tutorial
  Register Model Tutorial
  Testbench Examples
  Interview Questions

Digital Fundamentals
  Binary Arithmetic
  Boolean Logic
  Karnaugh Maps
  Combinational Logic
  Sequential Logic

Digital Full-Adder Circuit

A full-adder is a combinational circuit that adds two single-bit binary numbers and a carry-in, and produces a sum and a carry-out. The full-adder has three inputs and two outputs, one for the sum (S) and one for the carry-out (Cout). The third input of the full-adder is the carry-in (Cin) from the previous stage. It can be implemented using basic logic gates such as AND, XOR, and OR gates.

Read more: Digital Full-Adder Circuit

Digital Half-Adder Circuit

A half-adder is a combinational circuit that adds two single-bit binary numbers and produces the sum and carry as output. The half-adder has two inputs and two outputs, one for the sum (S) and one for the carry (C). It can be implemented using basic logic gates such as AND, XOR, and NOT gates.

Read more: Digital Half-Adder Circuit

Digital Demultiplexer Circuit

A demultiplexer, also known as a data distributor, is a combinational circuit that takes a single input and forwards it to one of multiple outputs based on the select signal. It has one input line, M select lines, and N output lines. The select input determines which output line the input signal will be forwarded to.

Read more: Digital Demultiplexer Circuit

Digital Multiplexer Circuit

A multiplexer, also known as a data selector, is a combinational circuit that selects data from multiple inputs and forwards one of them to a single output line based on the select signals. It has N input lines, M select lines, and one output line. The select inputs determine which input line is selected and forwarded to the output line.

Read more: Digital Multiplexer Circuit

Digital Encoder Circuit

An encoder is a combinational circuit that converts a set of inputs into a binary code. It has multiple input lines and a single output line. The encoder detects the active input and generates a binary code corresponding to that input.

Read more: Digital Encoder Circuit

  1. Digital Decoder Circuit
  2. Combinational Logic
  3. Universal Gates
  4. Karnaugh Maps
  5. Boolean Logic

Page 13 of 68

  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
Interview Questions
  Verilog Interview Set 1
  Verilog Interview Set 2
  Verilog Interview Set 3
  Verilog Interview Set 4
  Verilog Interview Set 5

  SystemVerilog Interview Set 1
  SystemVerilog Interview Set 2
  SystemVerilog Interview Set 3
  SystemVerilog Interview Set 4
  SystemVerilog Interview Set 5

  UVM Interview Set 1
  UVM Interview Set 2
  UVM Interview Set 3
  UVM Interview Set 4
Related Topics
  Digital Fundamentals
  Verilog Tutorial

  Verification
  SystemVerilog Tutorial
  UVM Tutorial
Latest in Verilog
  • Verilog $random
  • Verilog VCD Dump
  • Verilog VCD
  • Verilog Namespace
  • Verilog $stop $finish
Latest in SystemVerilog
  • SystemVerilog `define Macro
  • SystemVerilog Callback
  • SystemVerilog Interview Questions Set 10
  • SystemVerilog Interview Questions Set 9
  • SystemVerilog Interview Questions Set 8
Latest in UVM
  • UVM Callback
  • UVM Singleton Object
  • UVM Component [uvm_component]
  • UVM Object [uvm_object]
  • UVM Root [uvm_root]
© 2025 Funvizeo
Terms and Conditions